Blue Sage Communications uses multiple patent pending search algorithms in order to provide high performance, low latency area and power optimized search solutions.
All Blue Sage Algorithmic Search Engine solutions use standard components that are technology and process independent. In addition to the actual Search Engine design, Blue Sage provides all software drivers needed to configure and program the Search Engine. For hardware solutions, Blue Sage also provides a behavioral model, a test bench and sample test cases to validate the design.
Software solutions are optimized for deployment on general purpose processor cores and NPUs. The algorithms are modified to leverage cache architectures and distribution across multiple cores and threads in order to achieve high throughput and deterministic performance. NPU optimized designs make use of tightly coupled memories and other available accelerators like hardware pre-fetchers.
Hardware solutions are available that use on-chip RAMs for smaller tables and off-chip RAMs for larger tables. Off-chip RAMs can be either DDR3/4 memories for high capacity or RLDRAM and QDRII+ SRAM for low latency.
FPGA solutions are optimized to use on-chip Block RAMs and lookup tables.
ASIC solutions are optimized to use on-chip single port RAMs.
All solutions support optional Error Correction Codes (ECC) on both on-chip and off-chip RAMs
Compiler Driven Configurations
Users can select the desired throughput, rule capacity, string size and target device via a menu driven interface. A script automatically generates a behavioral model, actual RTL and test bench that matches the user configuration.